Ms. Sara Iacopetti, PhD. Candidate
Faculty of Materials Science and Engineering
Technion – Israel Institute of Technology
Haifa 3200003, Israel
As efficiency and cost of microchips scale with feature size, downscaling of MOSFETs in the last decades has taken place. While the silicide-based technology for the formation of source and drain (S/D) contact regions has long been established, short channel effects caused by lateral consumption of the semiconductor material during the silicidation pose a threat to further downscaling. This, combined with the recent benchmark technologies like strain-engineered channels and non-planar geometries of the devices, calls for a different approach to fabricate shallow, ohmic S/D contacts.
This research, performed in cooperation with Lam Research Inc., focuses on the microstructural and electrical characterization of shallow semiconductor contacts produced by Atomic Layer Etching (ALE) of the heavily doped Si and SiGe surface, followed by metal deposition by PVD without air-break. Different ALE doses and metals (Co, Mo, Ti) are analyzed. It is shown that ALE removes successfully the native oxide and generates a disordered, 2-3 nm thick, intermixed layer at the metal/semiconductor interface. The early stages of interface transformation and intermetallic formation, hence semiconductor consumption, are characterized. Contact resistivity measurements using Multiring Circular Transmission Line Method (MR-CTLM) show that ohmic contacts are achieved, with very low contact resistivity values of 10-9 Ωcm2 for p-doped SiGe and 10-8 Ωcm2 for n-doped Si. A model of the surface reactions that generate the interface microstructure is discussed in correlation with the contact resistivity trends.