Gabriela Ben-Melech Stan, PhD candidate
Auditorium, Meidan, for green pass holders, or via ZOOM
There’s Plenty of Room at the Bottom, Feynman stated in his famous lecture. Today’s fast-developing nanoscale electronic industry serves as a strong validation of Feynman’s prediction. However, in order to use that room properly, we need new instruction books and certainly new designer and simulation tools. One of the most basic components of electronic devices is the field-effect transistor (FET). The ability to make devices cheaper, smaller, and more efficient rely on the FET’s characteristic size limits. The characteristic channel length of 10nm is already old news, and recent semiconductors roadmaps point the way towards ballistic transistors and nanowire-based FETs. In order to meet the competitive target prices and shorter production cycles, the FET industry relies deeply on simulations, which decreases significantly the number of experiments needed to achieve optimal performance. Device simulations are based on charge transport models. So far, most models were calibrated based on experimental results, and evolved with the device scale downtrend, by extrapolations of previous models or tailored corrections per specific inaccuracies. Conventional models neglect quantum effects, which significantly affect the carrier and current densities in nanoscale devices, such as, dissipative noncoherent scattering involving electron-electron or electron-phonon. Trying to accurately capture various quantum behaviors, of a real-size system, is challenging due to limited computation resources.
This talk will present a multiscale approach to characterize carrier transport in nanoscale.
Advisor: Assoc Prof. Maytal Caspary-Toroker